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Introduction

Literature review during a research project is essential to avoid duplicate work. I mean If something is already study we don’t need to re-invent the wheel. In that case we should take advantage from the published paper to replicate the results and then push the knowledge forward with our new discoveries.

This time I will read and take notes from the paper “High-Resistance Metal Oxide Window Layers for Optimal Front Contact Interfaces in Sb₂Se₃ Solar Cells” to learn about the insertion of Metal Oxides as High-Resistive Transport (HRT) layers in antimony selenide (Sb₂Se₃) solar cells (TCO/HRT/CdS/Sb2Se3/Au). It is already reported that HRT layer helps to increase shunt resistance (↑R_p) of the solar cells.  However, the author explains that the last  reports about HRT has been focused only in the increase of the conversion efficiency of the solar cell. Thus in their work, the author gives a detailed study about the TCO/HRT interface which helps to decide which HRT film is better for the Sb₂Se₃ solar cell.

The variable of this work  is the HRT film:

1. TCO/CdS(60 nm)/Sb₂Se₃/Au (base line)
2. TCO/TiO₂/CdS(60 nm)/Sb₂Se₃/Au
3. TCO/ZnO/CdS(60 nm)/Sb₂Se₃/Au

Title:

• High-Resistance Metal Oxide Window Layers for Optimal Front Contact Interfaces in Sb₂Se₃ Solar Cells
• DOI: https://onlinelibrary.wiley.com/doi/10.1002/solr.202200265 

Authors:

• Joao O. Mendes
• Enrico Della Gaspera
• Joel van Embden* (School of Science RMIT University Melbourne, VIC 3000, Australia)

Journal

• Solar RRL 
• Impact Factor of 9.173 (Journal Citation Reports (Clarivate Analytics, 2022))

Abstract (204 words)

Herein, an in-depth experimental investigation into the effect of employing different high resistance metal oxide (HRMO) layers on the quality of the front contact in solar cells with an fluorine-doped tin oxide (FTO)/(HRMO)/CdS/ Sb₂Se₃/Au device architecture is presented. The application of ZnO or TiO₂ HRMO layers between FTO substrates and CdS improves the overall device performance. Short-circuit current gains of ≈20% orders of magnitude higher shunt resistances (10⁴ Ω cm²), and greatly improved device stabilities maintaining over 95% of their initial efficiency over 137 days are observed. A suppression of the unfavorable (120) orientation of the photoactive Sb₂Se₃ layer is observed in devices with HRMO interlayers. The application of HRMO layers is crucial to prevent both ohmic and non-ohmic current leaks and maintain device stability over time. Cross-over in the current-voltage (JV) curves observed in the case of TiO₂ indicates the presence of a high barrier for the diode current in these devices. Wavelength-dependent JV curves coupled with capacitance measurements and simulations show that this barrier can be attributed to a high density of interfacial acceptor states. In contrast, ZnO deposition is found to reduce interface defects and enhance the quality of the front contact, while boosting performance and increasing device longevity.

Notable extracts:

Ohmic shunts occur due to low shunt resistance pathways in the CdS buffer or absorber layer (highly conductive grain boundaries, regions of thinner CdS, ion migration at the main junction).

Non-ohmic shunts predominantly arise within regions of space charge limited current (SCLC) where the main junction field is weak.[22] Such SCLC regions may form where the rough FTO grains disrupt the thin CdS film and permit the Sb₂Se₃ to contact the FTO yielding a localized FTO/Sb2Se3/Au junction.

In the case of CdS-only devices, non-ohmic shunts were constant across countless CdS depositions and irrespective of the CdS thickness employed in the devices, further highlighting that these pathways are inherent to the CdS layer itself and not due to the quality of the deposition.

Personal Notes:

• Pay attention to the concepts of Ohmic and Non-Ohmic current leaks
• The HRT layer is necessary for the deposited CdS which has only 60 nm in thickness. At this film thickness the probability of having non-ohmic shunts is greater than for thicker CdS films (in my experience). However, the author explains that always will be non-ohmic shunts no matter the size of the CdS.
• According to Figure 1, the conversion efficiency is located between 3.5 and 4.5 depending on the deposited HRT layer.
• The use of HRT film in the Sb2Se3 solar cell helps to reduce the unfavorable (120) orientation
•  The interface states located at the CdS(60 nm)/HRT(10 nm) interface was investigate using SCAPS-1D however the comparison is not fair. The variation of trap states from 1.75×10¹² cm²  to 0.85×10¹² cm² should be applied to the same interface. For example CdS/TiO₂ and show if this change in interface states produces the cross over effect between the dark J-V curve and the illuminated J-V curve.
• They don’t mention the thickness of the HRT layer. This info is on the S9 Figure, supplementary data. However they made a variation on thickness from 5 nm – 50 nm by modifying the molarity of the precursor solution (0.1 M, 0.3 M, 0,5 M and 0.7M.
• The ZnO and TiO2 layers are deposited by Sol-Gel
• Optimal Thickness of TiO₂ is near 5 nm and ZnO 20 nm.  Thats why the author did not mentioned the HRT thickness in the main manuscript.  Reviewers should ask a similar thickness for both HRT layers.  Example: 10 nm

Bibliography: